In semiconductor manufacturing .. we have what are called "Via"s that connect two metal lines that carry signal or power. Typically this is part of what we call the back end part of the flow (front end being the transistors themselves). We use extreme (as in wavelength) UV photolithography to make the patterns as to where the openings should be on the metal lines that need to connected to other metal lines above and below. Sometimes, the mask patterns that get generated towards making these openings have a small shift (in the order of few nanometers) and it can cause unintentional shorts and opens. It is called "mis-registration" in the lingo and whenever that happens, we have to generate the entire mask layer (which can be very expensive, since changing one layer may cause other layers to change, and hence new patterns generated for those layers as well). Note that just 1 via mis-registation can kill an entire chip that is functional otherwise.
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Very many times, due to cost or the involved timeline, management wants us to figure out what the risk is (measured in terms of projected part returns per million for running the production line with the issue) before approving generating a new mask layer. We have to always fight the fight to push for the new mask layers since the amount of work it takes when we get a customer field return and debugging what caused it is a
severe loss of time - but probably cheaper compared to the loss in terms of returned parts.